Together, they have developed next-generation cryptographic solutions to support the security requirements of an array of mission-critical applications, including those used for DoD’s most sensitive secure communications systems.
The team’s latest innovation is the Wolverine, Rajant’s next-generation, fully programmable cryptographic module technology that leverages a commercially sourced System on a Chip (SoC) FPGA and Application-Specific Integrated Circuit (ASIC) network processor. Wolverine contains advanced encryption and authentication algorithms using a fail-safe design to secure multiple IIoT applications with future-proof flexibility. Here’s how:
Scalable Architecture with Custom Programmability
Wolverine utilizes industry-standard cells and IOs so that it can be easily migrated to meet higher performance requirements and/or to an ASIC design with minimal changes. Programmability also allows for customization of key management protocols such as EKMS and Tactical Key Management (TKM). Wolverine’s cryptographic algorithms support robust Key Rollover and future Over-The-Air-Keying (OTAK) solutions, which are essential methods for protecting classified data.
Secure Boot Capability that Goes Beyond Standard Security Processers
Wolverine’s Secure Boot capability governs what trusted software is allowed to run within the system and serializes the IP software/firmware modules upon initial load. This serialization means that every Wolverine-based solution has a uniquely encrypted software/FPGA image stored in flash while it is fielded. Therefore if an adversary obtains a decryption key from one Wolverine unit, it will be useless on all other Wolverine units.
Wolverine can also serve as the root certificate and symmetric key storage element for the system. Certifiable anti-tamper capabilities ensure the most critical aspect of the security architecture, the keys, are inaccessible to an adversary.
Future-Proof While Meeting Stringent Certification Requirements
Wolverine can be easily modified to meet a wide range of future crypto processing needs for algorithm agility, I/O flexibility, and Key Management evolution. New algorithms can be added while continuing to meet stringent U.S. Government certification requirements, and footprint-compatible FPGA options are available to increase FPGA fabric size.
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